Modelling and simulation (Verilog)
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Chuhar Jamali
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Description
Experience Level: Entry
I have done a Verilog module for clock and data recovery using DLL ( this is for simulation purposes only) I used Modelsim for simulation. In the transmitter (Tx), I only have a clock that has a random phase shift and random data both going to an XOR gate. The output is just data out. I also used Manchester coding scheme as a data format. The receiver (Rx) doesn't have a clock, it has to extract the clock and data using DLL. I would like to know what tools would help me to measure the phase shift (or jitter in the time domain)? I believe Simulink Matlab can do this but how to utilize my Verilog code? Is there any other software that is good in academia? I want to see which coding schemes (including Manchester, NRZ, RZ) that is more sensitive to jitter? I read that DLL is better in tolerating jitter than PLL and it doesn’t need a clock like in the case of PLL it has VCO. Having many chips with the same clock will make issues in sync so getting rid of the clock in each chip and using DLL with the help of self-timed Manchester coding might solve this issue but again back to the jitter how we would calculate the BER, jitter, and other parameters that are related and how we model the timing uncertainty?
Hammam A.
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2 May 2024
United Kingdom
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