Profile cover photo
You're now following
Error following user.
This user does not allow users to follow them.
You are already following this user.
Your membership plan only allows 0 follows. Upgrade here.
Successfully unfollowed
Error unfollowing user.
You have successfully recommended
Error recommending user.
Something went wrong. Please refresh the page and try again.
Email successfully verified.
User Avatar
Flag of UNITED STATES
redondo beach, united states
It's currently 11:57 PM here
Joined September 19, 2012
0 Recommendations

Rudy B.

@rudy03

0.0 (0 reviews)
0.0
0.0
0%
0%
Flag of UNITED STATES
redondo beach, united states
N/A
Jobs Completed
N/A
On Budget
N/A
On Time
N/A
Repeat Hire Rate

FPGA Designer

Over 7 years of experience in various types of algorithm developments, vhdl/verilog design, embedded processing. Design includes various high speed video applications, and heavily involved in signal processing and communication systems with dense DSP application such as FFT, channelizer, modulator/demodulator and various filter designs. Also involved in embedded processors using Microblaze/PowerPc, and developing APIs using C/C++.

Contact Rudy B. about your job

Log in to discuss any details over chat.

Portfolio

272429
272429

Reviews

Changes saved
No reviews to see here!

Experience

DSP engineer, vhdl/verilog coding

Startup Company
Apr 2010 - Present
Working on Video Compression algorithm development. Developed full rate HD vdieo system, capturing over firewire interface. applying compression methods, and transfer the data over gigabit interface to another board. Developed all the necessary interfaces and the .NET API.

digital designer

Northrop Grumman Aerospace System
Apr 2006 - May 2010 (4 years, 1 month)
Beamformer Algorithm design. Adaptive LMS filter design. Fixed-point Wideband Subchannelizers design, including presume window, DFT engines, filter banks, and barrel shifters. Advanced FPGA designing, packing and optimization of the specific targeted FPGA device. back-end processes from syntheses to place & route. Performed thorough floor-planning and advanced placement, using planAhead/FPGA-Editor for timing closure on highly utilized FPGAs. Developed bit-to-bit accurate models, in C/C++ Used Ma

Education

Master in EE

University of California, Los Angeles, United States 2005 - 2007
(2 years)

Bachelor in EE

University of California, Los Angeles, United States 2003 - 2005
(2 years)

Contact Rudy B. about your job

Log in to discuss any details over chat.

Verifications

Preferred Freelancer
Identity Verified
Payment Verified
Phone Verified
Email Verified
Facebook Connected

Certifications

vworker.png Foundation vWorker Member
Previous User Next User
Invite sent successfully!
Thanks! We’ve emailed you a link to claim your free credit.
Something went wrong while sending your email. Please try again.
Registered Users Total Jobs Posted
Freelancer ® is a registered Trademark of Freelancer Technology Pty Limited (ACN 142 189 759)
Copyright © 2024 Freelancer Technology Pty Limited (ACN 142 189 759)
Loading preview
Permission granted for Geolocation.
Your login session has expired and you have been logged out. Please log in again.